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History
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Digital Design & Comp. Arch. - Lecture 20: SIMD Processing (Vector and Array Processors) (Spring'21)
The Magic of RISC-V Vector Processing
Digital Design and Comp. Arch. - Lecture 19: SIMD Architectures (Vector and Array Processors) (S23)
Designing Open Processors for the Next Generation of Cryptography - Michael Gao | TEE.Salon
Next Generation DSP Digital Signal Processing Advances Edge AI
Andes Technology: A RISC-V OOO Vector Processor
Expanding a RISC-V Processor with Vector Instructions for Accelerating Machine Learning
SiFive Vector Processor Portfolio - Andrew Frame, SiFive
Digital Circuits - Lecture 20: SIMD (Vector and Array) Processors (ETH Zurich, Spring 2017)
Panel Discussion: Automotive Processor Design
Enabling next-generation processor simulations with SimEng
Deep Dive
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Last Updated: August 14, 2026
Conclusion
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